This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 11-091726, filed Mar. 31, 1999, the entire contents of which are incorporated herein by reference.
This invention relates to a solid-state image sensor, and more particularly to a solid-state image sensor with an improved read transistor portion for reading signal charges from a photoelectric conversion section, such as a photodiode.
In the field of solid-state image sensors, various techniques for amplifying MOS image sensors with an amplifying function in their pixels have been proposed. MOS image sensors of this type have been expected to be suitable for the reduction of the pixel size following an increase in the number of pixels or a reduction in the chip size. In addition, the MOS image sensors have the advantages that they consume less electric power and make it easier to integrate the sensor section with its peripheral circuit by the same CMOS process than CCD image sensors.
A MOS image sensor is composed of unit cells, each unit cell constituting one pixel, arranged two-dimensionally. A unit cell is composed of a photoelectric conversion element and a transistor. The signal charges generated by photoelectric conversion at the photoelectric conversion element modulate the potential at a signal storage section (a photodiode acting as a photoelectric conversion element generally also serves as a signal storage section). The amplifying transistor in a pixel is modulated according to the potential, thereby providing the inside of the pixel with an amplifying function.
One of the most important evaluation items concerning this type of device is a brightly shining (or a whitely shining monochrome) point (white defect) caused by an extremely high output among the pixels activated during a dark period. One of the causes of a white defect is leakage current from the photoelectric conversion section. To decrease the leakage current, it is necessary to keep a photodiode (PD) acting as a photoelectric conversion element away from the surface of the semiconductor substrate where many causes of leakage current exist. That is, it is necessary to form a PD in a place deep down from the substrate surface.
With a PD formed in a place deep down in the substrate, however, even when a maximum voltage of 3.3V applied to a device using CMOS transistors is applied to a read gate electrode, the potential below the gate does not rise sufficiently because there is a limit to the extent of the depletion layer. As a result, the electric charges have been read partially or not been read at all. The left-over charges or the processing thereof permit another noise to occur in the activated pixels.
To overcome the problem, a method of providing a second signal storage section under the gate electrode in the semiconductor substrate has been proposed (refer to Jpn. Pat. Appln. KOKAI Publication No. 11-274457). Use of the second signal storage section makes the effective gate length shorter and therefore can involve a short-channel effect.
Conventional CCD image sensors employ n-type substrates, whereas MOS image sensors use p/p+ substrates obtained by growing an epitaxial layer at a low B concentration of, for example, 1xc3x971014 cmxe2x88x923 to a thickness of about 5 to 10 xcexcm on the surface of the substrate with a very high B concentration of, for example, 1 to 3xc3x971018 cmxe2x88x923. The reason why conventional CCD image sensors employ n-type substrates is to prevent blooming and color cross talks from taking place by allowing those of the carriers generated by photoelectric conversion not gathered in the PD, particularly those generated deep in the substrate or those leaking from the PD due to strong incident light to be easily discarded to the substrate side, although they tend to leak into adjacent pixels by diffusion. Discarding carriers generated by photoelectric conversion, however, leads to a decrease in the sensitivity.
To solve the sensitivity decrease problem, CCD image sensors use a method of applying a higher read voltage (e.g., 5V) to widen the depletion layer and gathering carriers from a wider region. MOS image sensors are characterized by operating on a lower voltage than CCD image sensors. Because of the lower voltage driving, the depletion layer under the gate electrode does not get wider than that in CCD image sensors. Therefore, an improvement in the sensitivity by this method cannot be expected in MOS image sensors.
With this backdrop, MOS image sensors employ the aforementioned p/p+ substrate and gather generated carriers in the PD to increase the sensitivity without discarding them to the substrate side. FIG. 1 shows an impurity concentration distribution in the direction of depth in the PD of a MOS image sensor. FIG. 2 shows a potential distribution in the direction of depth. As shown in FIG. 1, such a profile as has the lowest B concentration at a specific depth (about 3 xcexcm) of the substrate is used. Use of the profile enables carries generated at a place deeper than the PD portion to bounce back toward the surface of the substrate by a low potential at a position deeper than the place with the lowest B concentration, even when the carriers attempt to diffuse more deeply. As a result, because part of the electrons rebounded gather in the PD by diffusion or the like, an improvement in the sensitivity can be expected as compared with an equivalent formed on an ordinary p-type Si substrate. Moreover, by increasing the concentration on the substrate side and shortening the lifetime of carriers, carriers generated at still deeper places can be prevented from leaking into adjacent pixels by diffusion.
In the impurity profile of the PD in an amplifying solid-state image sensor using a p/p+ substrate, the B concentration is high even at the surface of the substrate to provide a surface shield layer or the like and the B concentration is the lowest at a depth deeper than the depth at which the P (phosphorus) concentration of the PD peaks. Specifically, in this profile, even if electrons generated in the vicinity of the photodiode tend to flow toward a deeper place in the substrate, they are caused to bounce back to the surface side of the substrate at the aforesaid high B concentration place and diffuse sidewise in the substrate at the minimum point of B concentration. The flow of electrons is the cause of color cross talks. In any case, the diffusion of electrons rebounded at the high B concentration place might improve the sensitivity or cause color cross talks. Thus, the technical problem of MOS image sensors is to realize a PD structure capable of gathering carriers in the PD more efficiently.
In addition, MOS image sensors also have a noise feedback problem. At the impurity concentration in a conventional PD, even when the PD was operated on 3.3V, the signal charge stored in the PD could not be read out completely. Because of this, the capacitance C at the PD portion caused kTC noise. If noise charge is Q, the square mean of the noise charge is expressed as:
Q2=kTC.
As described above, in a MOS image sensor, the photoelectric conversion section must be kept away from the surface of the semiconductor substrate where many causes of leak current exist, that is, the photoelectric conversion section must be formed at a deep place from the substrate surface. In this case, low voltage driving at about 3.3V puts a limit on the extent of the depletion layer, which permits some of the signal charges to be left over or completely prevents the signal charges from being read.
In addition, although providing a second signal storage section under the gate has been proposed, this method might cause a short-channel effect.
In a MOS image sensor formed on a p/p+ substrate, use of low-voltage driving prevents the depletion layer from getting wider in the PD. As a result, an improvement in the sensitivity cannot be expected using a similar means to that in a CCD image sensor. In addition, the problem of carriers leaking into adjacent PDs (color cross talks) or a blooming problem arises. Furthermore, in conventional MOS image sensors, noise has occurred in the PD portion, leading to a poor picture quality.
An object of the present invention is to provide a solid-state image sensor which not only prevents a short-channel effect in the transistor section for reading the signal charges stored in the photoelectric conversion section but also reduces or eradicates the left-over signal charges, thereby reducing noise and improving the sensitivity.
Another object of the present invention is to provide a solid-state image sensor which not only improves the sensitivity even when being formed on a p/p+ substrate but also reduces carriers leaking into adjacent PDs (or color cross talk) and alleviating blooming.
Still another object of the present invention is to provide a solid-state image sensor which eliminates kTC noise caused by an effective capacitance at the PD portion and improves the picture quality.
To accomplish the foregoing objects, a solid-state image sensor according to a first aspect of the present invention comprises: a first-conductivity-type semiconductor layer with a surface; a second-conductivity-type first region provided in the semiconductor layer, constituting a photoelectric conversion section together with the semiconductor layer to store photoelectrically converted signal charges, and having a first end and a second end opposite to each other in one direction along the surface of the semiconductor layer; a gate electrode insulatively provided above the surface of the semiconductor layer so as to be adjacent to the second end of the first region, having a first end and a second end opposite to each other in the one direction along the surface of the base layer, the first end of the gate electrode being adjacent to the second end of the first region, and positioned on the surface of the semiconductor layer in a part other than that above the first region; a second-conductivity-type second region provided on an upper part of the first region on the second end side so as to be in contact with the first region, having a first end and a second end opposite to each other in the one direction along the surface of the semiconductor layer, and the second end of the second region being substantially aligned with the first end of the gate electrode in a direction perpendicular to the surface of the semiconductor layer; and a second-conductivity-type third region adjacent to the second end of the gate electrode, provided on the surface of the semiconductor layer opposite to the first region, and serving as a drain region.
It is desirable that the second end of the first region is displaced from the second end of the second region toward the first end of the second region.
It is desirable that there is provided a first-conductivity-type fourth region provided on the surface of the semiconductor layer above the first region and serving as a surface shield region whose impurity concentration is higher than that in the semiconductor layer.
It is desirable that there is further provided a first-conductivity-type fifth region provided under the third region and serving as a punch through stopper whose impurity concentration is higher than that in the semiconductor layer.
It is desirable that a depth at which the second-conductivity-type impurity concentration is the highest throughout the first region and the second region is 0.65 xcexcm or less below the surface of the semiconductor layer.
It is desirable that the semiconductor layer is a semiconductor substrate.
It is desirable that the semiconductor layer is a well provided at the surface of the semiconductor substrate.
It is desirable that the semiconductor layer is an epitaxial layer formed on a semiconductor substrate whose impurity concentration is higher than that in the semiconductor layer.
According to a second aspect of the present invention, there is provided a solid-state image sensor comprising: a p-type semiconductor substrate having a surface; a p-type well provided on the surface of the semiconductor substrate, an impurity concentration of the p-type well being lower than a p-type impurity concentration in a place of the semiconductor substrate deeper than the p-type well; and an n-type region provided in the p-type well and, together with the p-type well, forming a photoelectric conversion section, wherein a depth at which an n-type impurity concentration in the n-type region is the highest is deeper than a depth at which a p-type impurity concentration in a depth direction of the substrate is the lowest throughout the p-type well and the substrate.
It is desirable that a p-type surface shield layer whose impurity concentration is higher than that in the p-type well is formed above the n-type region.
It is desirable that the depth at which the impurity concentration in the n-type region is the highest is 0.65 xcexcm or less below the surface of the semiconductor substrate.
According to a third aspect of the present invention, there is provided a solid-state image sensor comprising: a semiconductor substrate of a first conductivity; and an imaging region formed on the semiconductor substrate and having unit cells arranged in a matrix, each of the unit cells including a photoelectric conversion section composed of a second conductivity-type region formed in the semiconductor substrate and a first conductivity-type region made up of the semiconductor substrate, and a signal scanning circuit, wherein an impurity concentration Na in the second conductivity-type region constituting the photoelectric conversion section is set so that a relationship with an impurity concentration Nb in the first conductivity-type region constituting the photoelectric conversion section satisfies a following expression:
0 less than Naxe2x88x92Nb less than 1xc3x971017 cmxe2x88x923.
It is desirable that a first conductivity-type surface shield layer whose impurity concentration is higher than that in the p-type semiconductor substrate is formed above the second conductivity-type region.
It is desirable that a depth at which the impurity concentration in the second conductivity-type region is the highest is 0.65 xcexcm or less below a surface of the semiconductor substrate.
It is desirable that each of the impurity concentration Na in the second conductivity-type region constituting the photoelectric conversion section and the impurity concentration Nb in the first conductivity-type region constituting the photoelectric conversion section is in a range of 1xc3x971014 cmxe2x88x923 to 1xc3x971018 cmxe2x88x923.
With the present invention, even when impurity ions are implanted deeply into the semiconductor substrate to reduce white defects, thereby forming the photoelectric conversion section, the signal charges stored in the photoelectric conversion section can be read sufficiently even at a voltage lower than a low power supply voltage of 3.3V or below used for the CMOS device by providing the second photoelectric conversion section in the upper part of the photoelectric conversion section on the gate electrode side. Specifically, the left-over signal charges stored in the photoelectric conversion section are reduced or eradicated, which reduces noise and improves the sensitivity.
Because the end of the second photoelectric conversion section on the gate side is formed so as to self-align with the closer end of the gate electrode, the short-channel effect of the signal read transistor is prevented.
FIGS. 3 and 4 show potential profiles to help explain the result of comparing a case with a second photoelectric conversion section with a case without the same. When there is no second photoelectric conversion section in a photodiode formed in a similar manner, the presence of a potential barrier prevents charges from being read as shown in FIG. 3. In contrast, when there is a second photoelectric conversion section, a charge path without a potential barrier is formed as shown FIG. 4, enabling charges to be read.
In addition, with the present invention, the depth at which the n-type impurity concentration in the photoelectric conversion section is the highest is deeper than the substrate depth at which the boron concentration in the direction of substrate depth is the lowest. This prevents electrons generated near the photoelectric conversion section from flowing toward a deeper place in the substrate and therefore those electrons from being rebounded in a deeper place of the substrate and diffusing sidewise. Consequently, the sensitivity is improved, color cross talks are reduced, and further blooming is suppressed.
Furthermore, with the present invention, the relationship between an impurity concentration Na in the second conductivity-type region constituting the photoelectric conversion section and an impurity concentration Nb in the first conductivity-type region below the photoelectric conversion section is set so as to satisfy the following expression: 0 less than Naxe2x88x92Nb less than 1xc3x971017 cmxe2x88x923. This causes the photoelectric conversion section to turn into a depletion region, making the noise charge Q at the photoelectric conversion section substantially zero. As a result, noise generated in a conventional photoelectric conversion section is eliminated, improving the picture quality.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.